Results
author = "RATTI, LODOVICO"
Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions
Author(s) :
TRAVERSI, GIANLUCA
,
RATTI, LODOVICO
,
MANGHISONI, MASSIMO
,
GAIONI, LUIGI
,
PANTANO, DEVIS
Description :
The purpose of this paper is to study the mechanisms underlying performance degradation in 130 nm and 90 nm commercial CMOS technologies exposed to high doses of ionizing radiation. The investigation has been mainly focused on their noise properties in view of applications to the design of low-noise...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
Investigating degradation mechanisms in 130nm and 90nm commercial CMOS technologies exposed to up to 100 Mrad ionizing radiation dose
Author(s) :
TRAVERSI, GIANLUCA
,
PANTANO, DEVIS
,
RATTI, LODOVICO
,
MANGHISONI, MASSIMO
,
GAIONI, LUIGI
Description :
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
Vertically integrated deep N-well CMOS MAPS with sparsification and time stamping capabilities for thin charged particle trackers
Author(s) :
RATTI, LODOVICO
,
GAIONI, LUIGI
,
MANGHISONI, MASSIMO
,
RE, VALERIO
,
TRAVERSI, GIANLUCA
Description :
A fine pitch, deep N-well CMOS monolithic active pixel sensor (DNW CMOS MAPS) with sparsified readout architecture and time stamping capabilities has been designed in a vertical integration (3D) technology. In this process, two 130 nm CMOS wafers are face-to-face bonded by means of thermo-compressio...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors
Author(s) :
TRAVERSI, GIANLUCA
,
RE, VALERIO
,
RATTI, LODOVICO
,
GAIONI, LUIGI
,
MANGHISONI, MASSIMO
Description :
The large scale of integration provided by CMOS processes with minimum feature size in the 100 nm range, makes them very attractive in the design of front-end electronics for highly pixelated detectors, where several functions need to be packed inside a relatively small silicon area. Nowadays, proce...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
A 3D deep n-well CMOS MAPS for the ILC vertex detector
Author(s) :
GAIONI, LUIGI
,
MANGHISONI, MASSIMO
,
RATTI, LODOVICO
,
RE, VALERIO
,
TRAVERSI, GIANLUCA
Description :
This work presents the features of a new kind of deep n-well monolithic active pixel sensor
(DNW-MAPS), called SDR1 (Sparsified Data Readout), which exploits the capabilities of vertical integration (3D) processing in view of the design of a high granularity detector for vertexing
applications at th...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier
Author(s) :
RE, VALERIO
,
GAIONI, LUIGI
,
MANGHISONI, MASSIMO
,
RATTI, LODOVICO
,
TRAVERSI, GIANLUCA
Description :
The progress of industrial microelectronic technologies has already overtaken the 130 nm CMOS generation that is currently the focus of IC designers for new front-end chips in LHC upgrades and other detector applications. In a broader time span, sub-100 nm CMOS processes may become appealing for the...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
Mechanisms of Noise Degradation in Low Power 65 nm CMOS Transistors Exposed to Ionizing Radiation
Author(s) :
RE, VALERIO
,
GAIONI, LUIGI
,
MANGHISONI, MASSIMO
,
RATTI, LODOVICO
,
TRAVERSI, GIANLUCA
Description :
Experimental data provide insight into the mechanisms governing the impact of gate and lateral isolation dielectrics and of scaling-related technological advances on noise and its sensitivity to total ionizing dose effects in Low Power 65 nm CMOS devices. The behavior of the 1/f noise term is correl...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0
Author(s) :
TRAVERSI, GIANLUCA
,
GAIONI, LUIGI
,
MANGHISONI, MASSIMO
,
RATTI, LODOVICO
,
RE, VALERIO
Description :
Deep N-Well (DNW) Monolithic Active Pixel Sensors (MAPS) have been developed in the last few years with the aim of building monolithic sensors with similar functionalities as hy- brid pixels systems. In these devices the triple well option, available in deep submicron processes, is exploited to impl...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
2D and 3D CMOS MAPS with high performance pixel-level signal processing
Author(s) :
TRAVERSI, GIANLUCA
,
GAIONI, LUIGI
,
MANGHISONI, MASSIMO
,
RATTI, LODOVICO
,
RE, VALERIO
Description :
Deep N-well (DNW) MAPS have been developed in the last few years with the aim of building monolithic sensors with similar functionalities as hybrid pixels systems. These devices have been fabricated in a planar (2D) 130 nm CMOS technology. The triple-well structure available in such an ultra-deep su...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English
Analog front-end for monolithic and hybrid pixels in a vertical integration CMOS technology
Author(s) :
MANAZZA, ALESSIA
,
ZUCCA, STEFANO
,
GAIONI, LUIGI
,
RATTI, LODOVICO
,
TRAVERSI, GIANLUCA
Description :
This work is concerned with the design of two different analog channels for hybrid and monolithic pixels in view of applications to the vertex detector at the SuperB Factory. The circuits have been designed in a 130 nm CMOS, vertical integration technology, which may provide some advantages in terms...
Repository :
Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) :
English