flag flag  

author = "GAIONI, Luigi"

Found 35 documents, displaying page 3 of 4

Perspectives of 65nm CMOS technologies for high performance front-end electronics

Description : The 65nm CMOS generation is currently being evaluated as a promising solution for the integration of high speed circuits with high functional density in a small pixel. This technology node has specific features, such as new materials introduced to limit the current tunneling through the thin dielec...
Repository : Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) : English

Impact of gate-leakage current noise in sub-100 nm CMOS front-end electronics

Description :
Repository : Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) : English

CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments

Description : 130 nm and 90 nm CMOS processes are going to be used in the design of mixed-signal integrated circuits for the readout of detectors in the future generation of HEP experiments. In applications such as inner SLHC detectors, these ultra-deep submicron systems will have to stand total doses of ionizing...
Repository : Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) : English

Instrumentation for gate current noise measurements on sub-100 nm MOS transistors

Description :
Repository : Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) : English

Review of radiation effects leading to noise performance degradation in 100-nm scale microelectronic technologies

Description : Advanced CMOS technologies promise to meet the demanding requirements of mixed-signal integrated circuits for detector readout in future experiments at SLHC, ILC and Super B Factory. In the particle physics community, microelectronics designers are presently evaluating CMOS processes with a minimum ...
Repository : Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) : English

MAPS with pixel level sparsified readout: from standard CMOS to vertical integration

Description :
Repository : Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) : English

Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0

Description : This work is concerned with the design of two different analog channels for hybrid and monolithic pixels readout in view of applications to the SVT at the SuperB Factory. The circuits have been designed in a 130 nm CMOS, vertically integrated technology, which, among others, may provide some advantag...
Repository : Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) : English

Noise behavior of a 180 nm CMOS SOI technology for detector front-end electronics

Description : This paper is motivated by the growing interest of the detector and readout electronics community towards silicon-on-insulator CMOS processes. Advanced SOI MOSFETs feature peculiar electrical characteristics impacting their performance with respect to bulk CMOS devices. Here we mainly focus on the s...
Repository : Aisberg - Archivio Istituzionale Università di Bergamo
Language(s) : English

Found 35 documents, displaying page 3 of 4